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Message-ID: <48B4586F.6030201@avtrex.com>
Date: Tue, 26 Aug 2008 12:24:31 -0700
From: David Daney <ddaney@...rex.com>
To: David Acker <dacker@...net.com>
Cc: e1000-devel@...ts.sourceforge.net, netdev@...r.kernel.org,
linux-mips <linux-mips@...ux-mips.org>
Subject: Re: [PATCH] e100: Add missing dma sync for proper operation with
non-coherent caches.
David Acker wrote:
> David Daney wrote:
>> diff --git a/drivers/net/e100.c b/drivers/net/e100.c
>> index 19d32a2..fb8d551 100644
>> --- a/drivers/net/e100.c
>> +++ b/drivers/net/e100.c
>> @@ -1840,6 +1840,11 @@ static int e100_rx_indicate(struct nic *nic,
>> struct rx *rx,
>>
>> if (readb(&nic->csr->scb.status) & rus_no_res)
>> nic->ru_running = RU_SUSPENDED;
>> + /* We are done looking at the buffer. Prepare it for
>> + * more DMA. */
>> + pci_dma_sync_single_for_device(nic->pdev, rx->dma_addr,
>> + sizeof(struct rfd),
>> + PCI_DMA_FROMDEVICE);
>> return -ENODATA;
>> }
>>
> Should the call to pci_dma_sync_single_for_device be DMA_TO_DEVICE since
> we are giving the memory back to the device?
No. We are giving the memory back to the device, but the direction of
the data transfer is from the device to memory.
David Daney
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