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Message-ID: <20090115101527.GR11228@pengutronix.de>
Date:	Thu, 15 Jan 2009 11:15:27 +0100
From:	Sascha Hauer <s.hauer@...gutronix.de>
To:	Greg Ungerer <gerg@...pgear.com>
Cc:	netdev@...r.kernel.org, Sebastian Siewior <bigeasy@...utronix.de>
Subject: Re: [PATCH] fec: Add mx2 support (WIP)

Hi Greg,

On Thu, Jan 15, 2009 at 05:22:21PM +1000, Greg Ungerer wrote:
> Hi Sascha,
>
> Sascha Hauer wrote:
>> Signed-off-by: Sascha Hauer <s.hauer@...gutronix.de>
>> ---
>>  drivers/net/Kconfig |    2 +-
>>  drivers/net/fec.c   |  121 +++++++++++++++++++++++++++++++++++++++++++++++++--
>>  drivers/net/fec.h   |   11 ++++-
>>  3 files changed, 127 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
>> @@ -1109,7 +1125,14 @@ static phy_info_t const phy_info_am79c874 = {
>>  /* register definitions for the 8721 */
>>   #define MII_KS8721BL_RXERCR	21
>> +#ifdef CONFIG_ARCH_MX2
>> + /* FIXME: is this a bug or board specific?
>> +  * 27 was found somewhere in the Freescale code
>> +  */
>> +#define MII_KS8721BL_ICSR	27
>> +#else
>>  #define MII_KS8721BL_ICSR	22
>> +#endif

I have just found the datasheet for this chip. The ICSR register is
indeed on 27, not on 22. So this is a bug in the driver. I will make a
seperate patch from this hunk.

>>  #define	MII_KS8721BL_PHYCR	31
>>   static phy_cmd_t const phy_cmd_ks8721bl_config[] = {
>> @@ -1698,6 +1721,95 @@ static void __inline__ fec_phy_ack_intr(void)
>>  {
>>  }
>>  +#elif defined(CONFIG_ARCH_MX2)
>> +
>> +/*
>> + * do some initializtion based architecture of this chip
>> + */
>> +static void inline fec_arch_init(void)
>> +{
>> +	struct clk *clk;
>> +	clk = clk_get(NULL, "fec_clk");
>> +	clk_enable(clk);
>> +	clk_put(clk);
>> +	return;
>> +}
>
> ColdFire builds break on fec_arch_init(), since it is only
> defined for ARCH_MX2.

Ok, I'll leave this one out and put it in my board file for now.

Regards
  Sascha

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