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Message-Id: <20090221.154218.174943978.davem@davemloft.net>
Date: Sat, 21 Feb 2009 15:42:18 -0800 (PST)
From: David Miller <davem@...emloft.net>
To: jeffrey.t.kirsher@...el.com
Cc: netdev@...r.kernel.org, gospo@...hat.com,
donald.c.skidmore@...el.com, peter.p.waskiewicz.jr@...el.com
Subject: Re: [net-next PATCH 1/2] ixgbe: fix Si errata - require L0's
disable on upstream device
From: Jeff Kirsher <jeffrey.t.kirsher@...el.com>
Date: Sat, 21 Feb 2009 14:23:19 -0800
> In order to work around a silicon errata on 82598 we need to disable L0's
> in the PCIe switch port to which the 82598 is connected, to prevent the
> duplicate completions caused by L0s.
>
> Signed-off-by: Don Skidmore <donald.c.skidmore@...el.com>
> Acked-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@...el.com>
> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@...el.com>
You can't implement this at this level guys.
PCI-E port hacks inside of individual child drivers will only
cause new bugs where these settings interfere with whatever
the PCI-E port driver wants to do.
Solve this either generically as a quirk in the PCI layer or
as some kind of PCI-E port driver attribute that can be
acted upon.
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