netdev - Re: [PATCH 2.6.30] cxgb3: clear shadow BAR registers

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Message-ID: <op.urpyfmweduofyu@cayman.asicdesigners.com>
Date:	Wed, 01 Apr 2009 10:48:48 -0700
From:	"Divy Le Ray" <divy@...lsio.com>
To:	"David Miller" <davem@...emloft.net>
Cc:	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	swise@...ngridcomputing.com
Subject: Re: [PATCH 2.6.30] cxgb3: clear shadow BAR registers

On Tue, 31 Mar 2009 20:34:57 -0700, David Miller <davem@...emloft.net>  
wrote:

> From: Divy Le Ray <divy@...lsio.com>
> Date: Tue, 31 Mar 2009 17:58:54 -0700
>
>> From: Divy Le Ray <divy@...lsio.com>
>>
>> Ensure that internal shadow BAR registers are cleared on 32-bit  
>> platforms.
>>
>> Signed-off-by: Divy Le Ray <divy@...lsio.com>
>
> Why is this a problem and why is it not possible to rely
> on these being setup to zero by either the BIOS or the PCI
> layer?
>
> At best this is a PCI quirk and not something that belongs
> in the driver.
>
> I'm not applying this.

Hi Dave,

You are right, this issue is motherboard specific and seems to have been  
fixed a loong time ago.
Sorry for the spam.

Cheers,
Divy



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