netdev - RE: [PATCH 1/2] ibm_newemac: Add Support for MAL Interrupt Coalescing

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Message-Id: <1253578027.7103.177.camel@pasglop>
Date:	Tue, 22 Sep 2009 10:07:07 +1000
From:	Benjamin Herrenschmidt <benh@...nel.crashing.org>
To:	Prodyut Hazarika <phazarika@...c.com>
Cc:	netdev@...r.kernel.org, Feng Kan <fkan@...c.com>,
	Loc Ho <lho@...c.com>, Victor Gallardo <vgallardo@...c.com>,
	bhutchings@...arflare.com, linuxppc-dev@...ts.ozlabs.org,
	davem@...emloft.net, jwboyer@...ux.vnet.ibm.com,
	lada.podivin@...il.com
Subject: RE: [PATCH 1/2] ibm_newemac: Add Support for MAL Interrupt
 Coalescing

On Mon, 2009-09-21 at 16:49 -0700, Prodyut Hazarika wrote:
> Hi Ben,
> Thanks for your comments.
> 
> 
> > What happens if we build a kernel that is supposed to boot with two
> > different variants of 405 or 440 ?
> 
> We cannot build a kernel with H/W Interrupt coalescing other than in
> 405EX/460EX/GT.
> This is controlled via KConfig (config IBM_NEW_EMAC_INTR_COALESCE
> depends on IBM_NEW_EMAC && (460EX || 460GT || 405EX))
> Is this approach acceptable (via Kconfig)?

No. That's my point. All of this must be runtime options. The kernel
must be buildablt for 460EX -and- 460GT - and an old 440EP if I want to
in a single image, and this -with- the coalescing option enabled. It
would obviously only be available when running on the cores that support
it, but it should -not- be a compile time decision.

IE. All your ifdef's should be turned into runtime checks. If you have
conflicting #define for register names and bits, then prefix them with
the SoC name.

The only acceptable compile-time option is to have the ability to not
compile the coalescing support at all, thus avoiding bloat when building
configs that are only targeted toward processors that don't have it or
setups that don't want it. 

> > There are existing mechanisms via ethtool to configure coalescing. You
> > should hookup onto these.
> 
> I will start looking at the ethtool options

Thanks.

Cheers,
Ben.

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