netdev - Re: [PATCH] [CAIF-RFC 2/8-v2] CAIF Protocol Stack

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Message-ID: <4AD2F6BD.1020608@babic.homelinux.org>
Date:	Mon, 12 Oct 2009 11:28:29 +0200
From:	Stefano Babic <stefano.babic@...ic.homelinux.org>
To:	sjur.brandeland@...ricsson.com
CC:	netdev@...r.kernel.org, kim.xx.lilliestierna@...ricsson.com,
	christian.bejram@...ricsson.com, daniel.martensson@...ricsson.com
Subject: Re: [PATCH] [CAIF-RFC 2/8-v2] CAIF Protocol Stack

sjur.brandeland@...ricsson.com wrote:
> From: Sjur Braendeland <sjur.brandeland@...ricsson.com>
> 

Hi Sjur,

> diff --git a/include/net/caif/generic/cfcnfg.h b/include/net/caif/generic/cfcnfg.h

> +/** Types of Physical Layers defined in CAIF Stack */
> +typedef enum _cfcnfg_phy_type_t {
> +	CFPHYTYPE_UNKNOWN = 0,
> +	CFPHYTYPE_SERIAL = 1,	/*!< Serial Physical Interface */
> +	CFPHYTYPE_SPI = 2,	/*!< SPI Physical Interface */
> +	CFPHYTYPE_MSL = 3,	/*!< MSL Physical Interface */
> +	CFPHYTYPE_SHM = 4,	/*!< Shared Memory Physical Interface */

You actually removed the shared memory driver. Do you plan to insert it
again ?

> +/**
> + * Adds a Adaptation Layer to the CAIF Stack.
> + * The Adaptation Layer is where the interface to application or higher-level
> + * driver functionality is implemented.
> + * \image html AddVeiCaifConfig.jpg "Add an Adaptation layer to CAIF Stack."

There are references to pictures that are not provided.

> diff --git a/include/net/caif/generic/cfglue.h b/include/net/caif/generic/cfglue.h

[snip]

> +/* ASSERT */
> +#define cfglu_assert(exp) BUG_ON(!(exp))

I do not why, but even GENERIC_BUG is not defined for all architectures.
This means that BUG_ON is simply removed by the compiler and we get no
track if the assert fails.
It should be better to add at least an internal trace (adding for
example a CFLOG_FATAL call).

> diff --git a/include/net/caif/generic/cfshml.h b/include/net/caif/generic/cfshml.h

Is thif file probably obsolete ?

> diff --git a/include/net/caif/generic/cfspil.h b/include/net/caif/generic/cfspil.h
> +/** @page SPI PHY Layer description.
> + *
> + *  SPI Physical layer is not implemented in GenCaif. The SPI PHY Layer
> + *  is HW dependent. But the CFSPIL (Caif SPI Layer) provides support for
> + *  implementing the SPI Layer Protocol.

Not sure I have understood. There is an abstraction layer for SPI in
kernel and some generic purpose functions are provided (spy_sync,
spi_async, etc.) that are HW independent. I know they provide only the
methods for the data transfer, but I have imagined that we need at this
point some kind of "caif_spi_device" that is able to talk with the caif
stack on one side and uses the functions in the SPI framework. In any
case, HW independent. Have I missed something ?

Stefano

-- 
stefano <stefano.babic@...ic.homelinux.org>
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