netdev - Re: [PATCH] skbuff: align sk

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Message-ID: <20100130014156.GZ25367@mail.wantstofly.org>
Date:	Sat, 30 Jan 2010 02:41:56 +0100
From:	Lennert Buytenhek <buytenh@...tstofly.org>
To:	Felix Fietkau <nbd@...nwrt.org>
Cc:	netdev@...r.kernel.org
Subject: Re: [PATCH] skbuff: align sk_buff::cb to 64 bit

On Fri, Jan 29, 2010 at 11:09:37PM +0100, Felix Fietkau wrote:

> The alignment requirement for 64-bit load/store instructions on ARM is
> implementation defined. Some CPUs (such as Marvell Feroceon) do not
> generate an exception, if such an instruction is executed with an
> address that is not 64 bit aligned. 
> In such a case, the Feroceon corrupts adjacent memory, which showed up
> in my tests as a crash in the rx path of ath9k that only occured with
> CONFIG_XFRM set. This crash happened, because the first field of the
> mac80211 rx status info in the cb is an u64, and changing it corrupted
> the skb->sp field.

Actually, only older Marvell CPU cores have this behavior.

The ARMv5 Architecture Reference Manual permits the behavior of not
throwing alignment exceptions for doubleword (64bit) load/stores to
4mod8 aligned addresses, and early Feroceons indeed don't, but
anything recent will throw an alignment exception.
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