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Message-ID: <20100331202748.GB3228@electric-eye.fr.zoreil.com>
Date:	Wed, 31 Mar 2010 22:27:48 +0200
From:	François Romieu <romieu@...zoreil.com>
To:	Al Viro <viro@...IV.linux.org.uk>
Cc:	Ben Hutchings <ben@...adent.org.uk>,
	David Miller <davem@...emloft.net>, timo.teras@....fi,
	ivecera@...hat.com, netdev@...r.kernel.org
Subject: Re: [PATCH] r8169: fix broken register writes

Al Viro <viro@...IV.linux.org.uk> :
[...]
> BTW, patch from upthread doesn't help on that box, and neither does
> simple reordering of MAC0 and MAC4 writes.  Adding reads of MAC0 and
> MAC4 after corresponding writes seems to work.

Does something like the patch below work too ?

I'd like to factor out the posted PCI write commits.

diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 9674005..8d1ab0f 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -542,6 +542,11 @@ static int rtl8169_poll(struct napi_struct *napi, int budget);
 static const unsigned int rtl8169_rx_config =
 	(RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
 
+static void r816x_pci_write_commit(void __iomem *ioaddr)
+{
+	RTL_R8(ChipCmd);
+}
+
 static void mdio_write(void __iomem *ioaddr, int reg_addr, int value)
 {
 	int i;
@@ -2825,8 +2830,13 @@ static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr)
 	spin_lock_irq(&tp->lock);
 
 	RTL_W8(Cfg9346, Cfg9346_Unlock);
+
 	RTL_W32(MAC4, high);
+	r816x_pci_write_commit(ioaddr);
+
 	RTL_W32(MAC0, low);
+	r816x_pci_write_commit(ioaddr);
+
 	RTL_W8(Cfg9346, Cfg9346_Lock);
 
 	spin_unlock_irq(&tp->lock);
--
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