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Message-ID: <20100804222741.GA18708@kryten>
Date: Thu, 5 Aug 2010 08:27:41 +1000
From: Anton Blanchard <anton@...ba.org>
To: Matt Carlson <mcarlson@...adcom.com>
Cc: davem@...emloft.net, netdev@...r.kernel.org, andy@...yhouse.net,
Michael Chan <mchan@...adcom.com>
Subject: Re: [PATCH net-next 09/14] tg3: Improve small packet performance
Hi,
Just saw this go in:
> static inline u32 tg3_tx_avail(struct tg3_napi *tnapi)
> {
> - smp_mb();
> + /* Tell compiler to fetch tx indices from memory. */
> + barrier();
> return tnapi->tx_pending -
> ((tnapi->tx_prod - tnapi->tx_cons) & (TG3_TX_RING_SIZE - 1));
> }
Which worries me. Are we sure we don't need any ordering (eg smp_rmb)?
A compiler barrier does nothing to ensure two loads are ordered.
Anton
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