netdev - Re: [RFC PATCH 1/2] pci: add function reset call that can be used inside of probe

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <4C61DD57.5030208@intel.com>
Date:	Tue, 10 Aug 2010 16:14:31 -0700
From:	Alexander Duyck <alexander.h.duyck@...el.com>
To:	Kenji Kaneshige <kaneshige.kenji@...fujitsu.com>
CC:	"Kirsher, Jeffrey T" <jeffrey.t.kirsher@...el.com>,
	"davem@...emloft.net" <davem@...emloft.net>,
	"jbarnes@...tuousgeek.org" <jbarnes@...tuousgeek.org>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>
Subject: Re: [RFC PATCH 1/2] pci: add function reset call that can be used
 inside	of probe

Kenji Kaneshige wrote:
> (2010/07/31 9:58), Jeff Kirsher wrote:
>> From: Alexander Duyck<alexander.h.duyck@...el.com>
>> +	/*
>> +	 * both INTx and MSI are disabled after the Interrupt Disable bit
>> +	 * is set and the Bus Master bit is cleared.
>> +	 */
>> +	pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
>> +
>> +	rc = __pci_dev_reset(dev, 0);
> 
> Could you tell me why you need to program command register before reset?
> 
> "MSI enable" and "Bus Master" bits are cleared by the reset. Furthermore,
> resetting the device clears the "Interrupt Disable bit", even though it
> was set just before the rest. So I'm a little confused.
> 
> Thanks,
> Kenji Kaneshige
> 

The point is to prevent any pending transactions from being on the bus 
while we are doing the reset.  By writing only the INTX disable bit we 
are disabling all interrupts from being generated, and also disabling 
all DMA and MSI interrupts since the bus master enable bit is not set.

Without this change the device might be in the middle of a transaction 
or sending an interrupt while we are doing the reset which may lead to 
other issues after the reset.

Thanks,

Alex
--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html