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Message-ID: <4C61F253.8050700@jp.fujitsu.com>
Date:	Wed, 11 Aug 2010 09:44:03 +0900
From:	Kenji Kaneshige <kaneshige.kenji@...fujitsu.com>
To:	Alexander Duyck <alexander.h.duyck@...el.com>
CC:	"Kirsher, Jeffrey T" <jeffrey.t.kirsher@...el.com>,
	"davem@...emloft.net" <davem@...emloft.net>,
	"jbarnes@...tuousgeek.org" <jbarnes@...tuousgeek.org>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>
Subject: Re: [RFC PATCH 1/2] pci: add function reset call that can be used
 inside	of probe

(2010/08/11 8:14), Alexander Duyck wrote:
> Kenji Kaneshige wrote:
>> (2010/07/31 9:58), Jeff Kirsher wrote:
>>> From: Alexander Duyck<alexander.h.duyck@...el.com>
>>> + /*
>>> + * both INTx and MSI are disabled after the Interrupt Disable bit
>>> + * is set and the Bus Master bit is cleared.
>>> + */
>>> + pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
>>> +
>>> + rc = __pci_dev_reset(dev, 0);
>>
>> Could you tell me why you need to program command register before reset?
>>
>> "MSI enable" and "Bus Master" bits are cleared by the reset. Furthermore,
>> resetting the device clears the "Interrupt Disable bit", even though it
>> was set just before the rest. So I'm a little confused.
>>
>> Thanks,
>> Kenji Kaneshige
>>
>
> The point is to prevent any pending transactions from being on the bus
> while we are doing the reset. By writing only the INTX disable bit we
> are disabling all interrupts from being generated, and also disabling
> all DMA and MSI interrupts since the bus master enable bit is not set.
>
> Without this change the device might be in the middle of a transaction
> or sending an interrupt while we are doing the reset which may lead to
> other issues after the reset.
>

Thank you for clarification. I understood.

Thanks,
Kenji Kaneshige


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