lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-ID: <20101113063551.GD3837@hack> Date: Sat, 13 Nov 2010 14:35:51 +0800 From: Américo Wang <xiyou.wangcong@...il.com> To: Cypher Wu <cypher.w@...il.com> Cc: Américo Wang <xiyou.wangcong@...il.com>, Yong Zhang <yong.zhang0@...il.com>, Eric Dumazet <eric.dumazet@...il.com>, linux-kernel@...r.kernel.org, netdev <netdev@...r.kernel.org> Subject: Re: Kernel rwlock design, Multicore and IGMP On Fri, Nov 12, 2010 at 07:06:47PM +0800, Cypher Wu wrote: >> >> Note, on Tile, it uses a little different algorithm. >> > >It seems that rwlock on x86 and tile have different behavior, x86 use >RW_LOCK_BIAS, when read_lock() it will test if the lock is 0, and if >so then the read_lock() have to 'spinning', otherwise it dec the lock; >when write_lock() tried it first check if lock is It seems that rwlock >on x86 and tile have different behavior, x86 use RW_LOCK_BIAS and if >so, set lock to 0 and continue, otherwise it will 'spinning'. >I'm not very familiar with x86 architecture, but the code seems like >working that way. No, they should be the same, sorry I made a mistake in the above reply. Although Tile uses shifts in implementation while x86 uses inc/dec, the idea is same, either writers use higher bits and readers use lower bits or vice-versa. -- Live like a child, think like the god. -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Powered by blists - more mailing lists