netdev - [PATCH 0/1] DSA: Enable cascading for multiple 6131 chips

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Date:	Mon, 20 Jun 2011 13:40:32 -0700
From:	Barry Grussling <barry@...ssling.com>
To:	netdev@...r.kernel.org
Cc:	buytenh@...tstofly.org, Barry Grussling <barry@...ssling.com>
Subject: [PATCH 0/1] DSA: Enable cascading for multiple 6131 chips

I found that the Cascade Port field of the 6131 was always set
to 0xe which results in from_cpu frames being discarded.  This
means cascading style multi chip DSA configuration didn't work
for me.  I am a little confused by this since we configure the 
DSA routing table a little further down in the function.  

It seems like we need to enable cascading by setting the 
Cascade Port field to 0xf if we are in a multi-chip scenario.

Barry Grussling (1):
  Allow cascading to work with 6131 chip

 net/dsa/mv88e6131.c |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html