netdev - Re: [PATCH v11 5/5] powerpc: Fix up fsl-flexcan device tree binding.

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Message-ID: <4E42D09E.4080405@freescale.com>
Date:	Wed, 10 Aug 2011 13:40:30 -0500
From:	Scott Wood <scottwood@...escale.com>
To:	Robin Holt <holt@....com>
CC:	Kumar Gala <galak@...nel.crashing.org>,
	Wolfgang Grandegger <wg@...ndegger.com>,
	U Bhaskar-B22300 <B22300@...escale.com>,
	Grant Likely <grant.likely@...retlab.ca>,
	Marc Kleine-Budde <mkl@...gutronix.de>,
	<socketcan-core@...ts.berlios.de>, <netdev@...r.kernel.org>,
	PPC list <linuxppc-dev@...ts.ozlabs.org>,
	<devicetree-discuss@...ts.ozlabs.org>
Subject: Re: [PATCH v11 5/5] powerpc: Fix up fsl-flexcan device tree binding.

On 08/10/2011 01:30 PM, Robin Holt wrote:
> On Wed, Aug 10, 2011 at 12:36:22PM -0500, Scott Wood wrote:
>> On 08/10/2011 12:19 PM, Robin Holt wrote:
>>> On Wed, Aug 10, 2011 at 11:56:28AM -0500, Scott Wood wrote:
>>>> Also may want to list fsl,p1010-rdb as a "canonical compatible" for
>>>> anything which is backwards compatible with p1010's implementation.
>>>
>>> How do I specify 'canonical compatible'?
>>
>> Something like:
>>
>>   compatible: Should be "fsl,<processor>-flexcan" and "fsl,flexcan".
>>
>>   An implementation should also claim any of the following compatibles
>>   that it is fully backwards compatible with:
>>
>>   - fsl,p1010-rdb

Gah, I don't know how "rdb" replaced "flexcan" in the above.  Sorry for
any confusion.

> I am so confused.  fsl,p1010-flexcan refers, in my mind at least, to
> a particular chiplet on the p1010 freescale processor. 

It refers to a particular version of the flexcan logic, for which the
hardware doc people weren't kind enough to give us a public version number.

It has been common and recommended practice in such cases, when there
are multiple chips containing the same device, to pick a canonical chip
(such as the first one to have the device or to be supported) and have
others claim compatibility with it.

> fsl,p1010-rdb
> would mean nothing to me as that is a p1010 processor with two flexcan
> chiplets wired to a pair of DB-9 jacks.  For the driver, what additional
> information is being conveyed?

The programming model of the flexcan chiplet.

> Let's cut to the chase.  Here is what I have after incorporating your
> earlier comment about the compatible line.  Please mark this up to
> exactly what you are asking for.
> 
> Thanks,
> Robin
> ------------------------------------------------------------------------
> Flexcan CAN contoller on Freescale's ARM and PowerPC processors
> 
> Required properties:
> 
> - compatible : Should be "fsl,<processor>-flexcan" and "fsl,flexcan"

   An implementation should also claim any of the following compatibles
   that it is fully backwards compatible with:

   - fsl,p1010-flexcan

> - reg : Offset and length of the register set for this device
> - interrupts : Interrupt tuple for this device
> 
> Example:
> 
>   can@...00 {
>           compatible = "fsl,p1010-flexcan", "fsl,flexcan";
>           reg = <0x1c000 0x1000>;
>           interrupts = <48 0x2>;
>           interrupt-parent = <&mpic>;
>   };
> 

-Scott

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