netdev - RE: [PATCH 1/1] PHY configuration for compatible issue

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Message-Id: <201111210213.pAL2DRxt013405@jmr105.jmicron.com>
Date:	Mon, 21 Nov 2011 10:13:27 +0800
From:	"Aries Lee" <arieslee@...cron.com>
To:	"'Guo-Fu Tseng'" <cooldavid@...ldavid.org>,
	<netdev@...r.kernel.org>
Cc:	"'AriesLee'" <AriesLeeILan@...il.com>
Subject: RE: [PATCH 1/1]  PHY configuration for compatible issue


Yes ~~ that's indeed a good suggestion

-----Original Message-----
From: Guo-Fu Tseng [mailto:cooldavid@...ldavid.org] 
Sent: Saturday, November 19, 2011 12:20 PM
To: Aries Lee; netdev@...r.kernel.org
Cc: 'AriesLee'
Subject: RE: [PATCH 1/1] PHY configuration for compatible issue

On Fri, 18 Nov 2011 15:13:37 +0800, Aries Lee wrote
> Hi Guo-Fu and All
> 
> 	Because jme_phy_on() and jme_phy_off() just turn on/off the PHY, the
> value of extern register is still the power on default value, not the most
> robust value which we collect in the LAB.
Sure, I got it. That's the point of this patch isn't it? :p
+     /*  Turn PHY off */ 
+     bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); 
+     bmcr |= BMCR_PDOWN; 
+     jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); 
+     /*  Turn PHY on */ 
+     bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); 
+     bmcr &= ~BMCR_PDOWN; 
+     jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); 
But what I mean is this part of the code.

Guo-Fu Tseng

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