netdev - Re: [PATCH] r8169: RxConfig hack for the 8168evl.

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Message-Id: <20120626.164118.924203209791240399.davem@davemloft.net>
Date:	Tue, 26 Jun 2012 16:41:18 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	romieu@...zoreil.com
Cc:	hayeswang@...ltek.com, netdev@...r.kernel.org, thomas.pi@...or.de
Subject: Re: [PATCH] r8169: RxConfig hack for the 8168evl.

From: Francois Romieu <romieu@...zoreil.com>
Date: Tue, 26 Jun 2012 11:22:51 +0200

> hayeswang <hayeswang@...ltek.com> :
> [...]
>> The definition of the IO 0x44 bit 14 is opposite for new chips.
>> For 8111C, 0 means fetching one Rx descriptor, and 1 means fetching
>> multi-descriptors.
>> For 8111D and the later chips, 0 means fetching multi-descriptors, and 1 means
>> fetching one Rx descriptor.
> 
> Ok. Is there much point fetching one Rx descriptor versus several ?

It can help if the chip accesses enough at a time to fill a full cache
line.

In drivers I've written for chips that can do this, I've had the code
only post RX descriptors in chunks rather than one at a time, to
facilitate this even further.
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