netdev - RE: [PATCH] mlx4_en: map entire pages to increase throughput

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Message-ID: <AE90C24D6B3A694183C094C60CF0A2F6026B6F8B@saturn3.aculab.com>
Date:	Tue, 17 Jul 2012 13:42:04 +0100
From:	"David Laight" <David.Laight@...LAB.COM>
To:	"David Miller" <davem@...emloft.net>, <rick.jones2@...com>
Cc:	<cascardo@...ux.vnet.ibm.com>, <netdev@...r.kernel.org>,
	<yevgenyp@...lanox.co.il>, <ogerlitz@...lanox.com>,
	<amirv@...lanox.com>, <brking@...ux.vnet.ibm.com>,
	<leitao@...ux.vnet.ibm.com>, <klebers@...ux.vnet.ibm.com>
Subject: RE: [PATCH] mlx4_en: map entire pages to increase throughput

> > That seems rather extraordinarily low - Power7 is supposed to be a
> > rather high performance CPU.  The last time I noticed O(3Gbit/s) on
> > 10G for bulk transfer was before the advent of LRO/GRO - that was in
> > the x86 space though.  Is mapping really that expensive with Power7?
> 
> Unfortunately, IOMMU mappings are incredibly expensive.  I see effects
> like this on Sparc too.

Would there be any mileage in permanently allocating IOMMU
virtual address to the ring entries, then 'just' assigning
the correct physical address during rx/tx setup?

A long time ago it used to be much faster on sparc systems
to receive into a permanently mapped buffer area and then
do a maximally aligned copy into the actual rx buffer.

	David



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