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Message-ID: <5069618A.5020105@gmail.com>
Date: Mon, 01 Oct 2012 11:25:30 +0200
From: Daniel Mack <zonque@...il.com>
To: Daniel Mack <zonque@...il.com>
CC: netdev@...r.kernel.org, Mugunthan V N <mugunthanvnm@...com>,
Vaibhav Hiremath <hvaibhav@...com>,
"David S. Miller" <davem@...emloft.net>
Subject: Re: [PATCH v2] net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL
On 27.09.2012 21:19, Daniel Mack wrote:
> For RMII/RGMII mode operation in 100Mbps, the CPSW needs to set the
> IFCTL_A bits in the MACCONTROL register. For all other PHY modes, this
> bit is unused, so setting it unconditionally shouldn't cause any
> trouble.
>
> Signed-off-by: Daniel Mack <zonque@...il.com>
> Cc: Mugunthan V N <mugunthanvnm@...com>
> Cc: Vaibhav Hiremath <hvaibhav@...com>
> Cc: David S. Miller <davem@...emloft.net>
Mugunthan, are you ok with this version? Don't know if it's too late for
the 3.7 spin though, given that the merge window just opened.
Daniel
> ---
> drivers/net/ethernet/ti/cpsw.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
> index aa78168..fb1a692 100644
> --- a/drivers/net/ethernet/ti/cpsw.c
> +++ b/drivers/net/ethernet/ti/cpsw.c
> @@ -386,6 +386,11 @@ static void _cpsw_adjust_link(struct cpsw_slave *slave,
> mac_control |= BIT(7); /* GIGABITEN */
> if (phy->duplex)
> mac_control |= BIT(0); /* FULLDUPLEXEN */
> +
> + /* set speed_in input in case RMII mode is used in 100Mbps */
> + if (phy->speed == 100)
> + mac_control |= BIT(15);
> +
> *link = true;
> } else {
> mac_control = 0;
>
--
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