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Message-ID: <50CF4E1A.1060207@6wind.com>
Date: Mon, 17 Dec 2012 17:53:46 +0100
From: Nicolas Dichtel <nicolas.dichtel@...nd.com>
To: David Laight <David.Laight@...LAB.COM>
CC: tgraf@...g.ch, netdev@...r.kernel.org, davem@...emloft.net
Subject: Re: [PATCH] netlink: align attributes on 64-bits
Le 17/12/2012 10:59, David Laight a écrit :
>> - if (unlikely(skb_tailroom(skb) < nla_total_size(attrlen)))
>> + int align = IS_ALIGNED((unsigned long)skb_tail_pointer(skb), sizeof(void *)) ? 0 : 4;
>> +
>> + if (unlikely(skb_tailroom(skb) < nla_total_size(attrlen) + align))
>> return -EMSGSIZE;
>>
>> + if (align) {
>> + /* Goal is to add an attribute with size 4. We know that
>> + * NLA_HDRLEN is 4, hence payload is 0.
>> + */
>> + __nla_reserve(skb, 0, 0);
>> + }
>> +
>
> Shouldn't the size of the dummy parameter be based on the value
> of 'align' - and that be based on the amount of padding needed?
>
Align is 4 or 0. Instead of the comment and 0, I can put 'NLA_HDRLEN - align',
which will always be 0, because we made this patch because we don't want to
change values like NLA_HDRLEN, because many user apps have these values
/structures hardcoded.
> That aligns the write pointer, what guarantees the alignment of
> the start of the buffer - so that the reader will find aligned data?
As Thomas said, skb->head will be aligned, am I wrong?
>
> What guarantees that the reader will read the data into an
> 8-byte aligned buffer.
>
> There is also the lurking issue of items that require more
> than 8-byte alignment.
> (x86/amd64 requires 16-byte alignment for 16-byte SSE2 regs and
> 32-byte alignment for the AVX regs.)
>
> Will anyone ever want to put such items into a netlink message?
>
> David
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