netdev - Re: [net PATCH 1/1] drivers: net: cpsw: fix cpsw clock gating issue across suspend/resume

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Message-Id: <20130619.183416.530352072063563371.davem@davemloft.net>
Date:	Wed, 19 Jun 2013 18:34:16 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	mugunthanvnm@...com
Cc:	netdev@...r.kernel.org
Subject: Re: [net PATCH 1/1] drivers: net: cpsw: fix cpsw clock gating
 issue across suspend/resume

From: Mugunthan V N <mugunthanvnm@...com>
Date: Tue, 18 Jun 2013 15:04:35 +0530

> Due to some hardware integration issue, CPSW sliver modules requires a
> reset across suspend/resume cycle for a successful clock gating to
> CPGMAC (CPSW and Davinci MDIO) in AM335x PG1.0.
> This issue is fixed in PG2.x, though to support suspend/resume on PG1.0
> this reset is required.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@...com>

Applied, thanks.
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