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Message-ID: <90629591B1A5485C845DAC6572F25924@kosagi.com>
Date:	Thu, 1 Aug 2013 14:23:27 +0800
From:	Sean Cross <xobs@...agi.com>
To:	Duan Fugang-B38611 <B38611@...escale.com>
Cc:	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"devicetree@...r.kernel.org" 
	<devicetree@...r.kernel.org>, David Miller <davem@...emloft.net>,
	"stephen@...workplumber.org" 
	<stephen@...workplumber.org>, Steven Rostedt <rostedt@...dmis.org>
Subject: Re: [PATCH] net/phy: micrel: Add OF configuration support

On Thursday, August 1, 2013 at 1:31 PM, Duan Fugang-B38611 wrote:
> On Thu, Aug 01, 2013 at 12:17 PM, Sean Cross wrote:
> 
> > +/* Write/read to/from extended registers */
> > +#define MII_KSZPHY_EXTREG 0x0b
> > +#define KSZPHY_EXTREG_WRITE 0x8000
> > +
> > +#define MII_KSZPHY_EXTREG_WRITE 0x0c
> > +#define MII_KSZPHY_EXTREG_READ 0x0d
> > +
> > +/* Write/read to/from extended registers */
> > +#define MII_KSZPHY_EXTREG 0x0b
> > +#define KSZPHY_EXTREG_WRITE 0x8000
> > +
> > +#define MII_KSZPHY_EXTREG_WRITE 0x0c
> > +#define MII_KSZPHY_EXTREG_READ 0x0d
> > +
> 
> 
> 
> Pls don't re-define the registers address and field.
My fault.  I'll remove this redundancy. 
> > + if (!of_property_read_u32(of_node,
> > + "micrel,clk-control-pad-skew",
> > + &val))
> > + kszphy_extended_write(phydev,
> > + MII_KSZPHY_CLK_CONTROL_PAD_SKEW,
> > + val);
> 
> 
> 
> When re-set rx/tx clock delay, rx/tx control delay, it is better to do dummy read the extended MII_KSZPHY_CLK_CONTROL_PAD_SKEW register one time.
Can you please explain this?  I don't see anything in the datasheet I'm looking at (ksz9021rl) describing dummy reads.  If both tx and rx skew are adjusted, should there be two dummy reads or just one? 


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