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Date:	Wed, 13 Aug 2014 08:52:30 +0000
From:	David Laight <David.Laight@...LAB.COM>
To:	'Alexei Starovoitov' <ast@...mgrid.com>,
	"David S. Miller" <davem@...emloft.net>
CC:	Ingo Molnar <mingo@...nel.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Andy Lutomirski <luto@...capital.net>,
	Steven Rostedt <rostedt@...dmis.org>,
	Daniel Borkmann <dborkman@...hat.com>,
	Chema Gonzalez <chema@...gle.com>,
	Eric Dumazet <edumazet@...gle.com>,
	"Peter Zijlstra" <a.p.zijlstra@...llo.nl>,
	"H. Peter Anvin" <hpa@...or.com>,
	"Andrew Morton" <akpm@...ux-foundation.org>,
	Kees Cook <keescook@...omium.org>,
	"linux-api@...r.kernel.org" <linux-api@...r.kernel.org>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH RFC v4 net-next 00/26] BPF syscall, maps, verifier,
 samples, llvm

From: Of Alexei Starovoitov
> one more RFC...
> 
> Major difference vs previous set is a new 'load 64-bit immediate' eBPF insn.
> Which is first 16-byte instruction. It shows how eBPF ISA can be extended
> while maintaining backward compatibility, but mainly it cleans up eBPF
> program access to maps and improves run-time performance.

Wouldn't it be more sensible to follow the scheme used by a lot of cpus
and add a 'load high' instruction (follow with 'add' or 'or').
It still takes 16 bytes to load a 64bit immediate value, but the instruction
size remains constant.
There is nothing to stop any JIT software detecting the instruction pair.

	David



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