netdev - Re: [PATCH v1 3/5] dtb: Add 10GbE node to APM X-Gene SoC device tree

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Date:	Wed, 24 Sep 2014 10:37:28 +0100
From:	Mark Rutland <mark.rutland@....com>
To:	Iyappan Subramanian <isubramanian@....com>
Cc:	"davem@...emloft.net" <davem@...emloft.net>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"kchudgar@....com" <kchudgar@....com>,
	"patches@....com" <patches@....com>
Subject: Re: [PATCH v1 3/5] dtb: Add 10GbE node to APM X-Gene SoC device tree

Hi,

For some reason, the below appears to use a mixture of spaces and tabs
for alignment. Assuming my local mailserver isn't responsible for that,
could you please correct that and for consistency use tabs?

Could you also please Cc the arm64 maintainers when submitting arm64
patches?

On Wed, Sep 24, 2014 at 04:51:26AM +0100, Iyappan Subramanian wrote:
> Added 10GbE interface and clock nodes.
> 
> Signed-off-by: Iyappan Subramanian <isubramanian@....com>
> ---
>  arch/arm64/boot/dts/apm-mustang.dts |  4 ++++
>  arch/arm64/boot/dts/apm-storm.dtsi  | 24 ++++++++++++++++++++++++
>  2 files changed, 28 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/apm-mustang.dts b/arch/arm64/boot/dts/apm-mustang.dts
> index b2f5622..2ae782b 100644
> --- a/arch/arm64/boot/dts/apm-mustang.dts
> +++ b/arch/arm64/boot/dts/apm-mustang.dts
> @@ -32,3 +32,7 @@
>  &menet {
>  	status = "ok";
>  };
> +
> +&xgenet {
> +	status = "ok";
> +};
> diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi
> index c0aceef..ae814ef 100644
> --- a/arch/arm64/boot/dts/apm-storm.dtsi
> +++ b/arch/arm64/boot/dts/apm-storm.dtsi
> @@ -176,6 +176,16 @@
>  				clock-output-names = "menetclk";
>  			};
>  
> +                        xge0clk: xge0clk@...1c000 {
> +				compatible = "apm,xgene-device-clock";
> +				#clock-cells = <1>;
> +				clocks = <&socplldiv2 0>;
> +				reg = <0x0 0x1f61c000 0x0 0x1000>;
> +				reg-names = "csr-reg";
> +				csr-mask = <0x3>;
> +				clock-output-names = "xge0clk";
> +                        };
> +
>  			sataphy1clk: sataphy1clk@...1c000 {
>  				compatible = "apm,xgene-device-clock";
>  				#clock-cells = <1>;
> @@ -421,5 +431,19 @@
>  
>  			};
>  		};
> +
> +                xgenet: ethernet@...10000 {
> +			compatible = "apm,xgene-enet";
> +                        status = "disabled";
> +                        reg = <0x0 0x1f610000 0x0 0xd100>,
> +                              <0x0 0x1f600000 0x0 0X400>,
> +                              <0x0 0x18000000 0x0 0X200>;
> +			reg-names = "enet_csr", "ring_csr", "ring_cmd";
> +                        interrupts = <0x0 0x60 0x4>;
> +			dma-coherent;
> +                        clocks = <&xge0clk 0>;

> +                        local-mac-address = [00 01 73 00 00 04];

Does it really make sense to hard-code the same mac address for all
mustang boards?

Mark.

> +			phy-connection-type = "xgmii";
> +                };
>  	};
>  };
> -- 
> 1.9.1
> 
> --
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