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Date: Mon, 17 Nov 2014 14:56:45 +0000 From: Bruno Thomsen <bth@...strup.dk> To: Johan Hovold <johan@...nel.org> CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>, "f.fainelli@...il.com" <f.fainelli@...il.com>, "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>, "bruno.thomsen@...il.com" <bruno.thomsen@...il.com>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org> Subject: RE: phy/micrel: KSZ8031RNL RMII clock reconfiguration bug > Did you specify a led-mode as well, or was the Operation Mode Strap Override (OMSO) write the first access after the soft reset? No led-mode was specified so OMSO was the first write. > Did you try any other workarounds besides setting the clock mode before doing the OMSO write? I spend around 2 weeks hunting down the bug. During which I tried many things in both the Freescale FEC MAC driver and the Micrel PHY driver. Changing the init and the probe flow as well as adding a lot of extra debug traces. > And REF_CLK (pin 16) is not connected? Yes, pin 16 is floating. > Would you able to test my series on your setup, and possibly a couple of diagnostic patches on top? Sure, I can try later this week. /Bruno -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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