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Message-ID: <20141119150831.GM16103@lunn.ch>
Date:	Wed, 19 Nov 2014 16:08:31 +0100
From:	Andrew Lunn <andrew@...n.ch>
To:	Oliver Graute <oliver.graute@...il.com>
Cc:	Florian Fainelli <f.fainelli@...il.com>,
	Andrew Lunn <andrew@...n.ch>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	buytenh@...tstofly.org
Subject: Re: Device Tree Binding for Marvell DSA Switch on imx28 board over
 Mdio Interface

On Wed, Nov 19, 2014 at 08:49:50AM +0100, Oliver Graute wrote:
> On Tue, Nov 18, 2014 at 7:23 PM, Florian Fainelli <f.fainelli@...il.com> wrote:
> > On 11/18/2014 12:30 AM, Oliver Graute wrote:
> >>> Hi Oliver
> >>>
> >>> How do you have the strapping pins on the switch set? They determine
> >>> what address on the mdio bus the chip responds to.
> >>
> >> On the circuit diagram the PIN 54  (P5_IND1/P5ID1) is set to
> >> "Configuration Address: 0101"
> >> P5_MODE[3:0]=0111 = Single RMII MAC Mode (100Mbps FD with 50 MHz clock input)
> >> PIN 59 R1_LED/NO_CPU Configuration: CPU is attached SMI address is 0x10 to 0x1F
> >>
> >> But what is the mdio address of the whole switch? or can I only
> >> address individual phy ports?
> >
> > You should specify in the Device Tree the switch pseudo-PHY address,
> > typically 16 for Marvell switches. You can still access the individual
> > ports' PHY addresses using address 0 through N.
> >
> 
> How do I do that exactly? do you have an example Device Tree Snippet?

Here is an example for a Dlink DIR665.

http://www.spinics.net/lists/arm-kernel/msg374004.html

you need to modify this line:

reg = <0 0>;	/* MDIO address 0, switch 0 in tree */

Change the first 0 to 0x10.

       Andrew
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