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Message-ID: <20141126160456.GJ14866@arm.com>
Date:	Wed, 26 Nov 2014 16:04:56 +0000
From:	Will Deacon <will.deacon@....com>
To:	Alexander Duyck <alexander.h.duyck@...hat.com>
Cc:	"linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
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	"davem@...emloft.net" <davem@...emloft.net>
Subject: Re: [PATCH v5 2/4] arch: Add lightweight memory barriers dma_rmb()
 and dma_wmb()

On Tue, Nov 25, 2014 at 04:26:28PM +0000, Alexander Duyck wrote:
> On 11/25/2014 06:01 AM, Will Deacon wrote:
> > If we ever see platforms using Linux/dma_alloc_coherent with devices
> > mastering from a different outer-shareable domain that the one containing
> > the CPUs, then we'll need to revisit this.
> 
> Would we just need a system wide memory barrier in that case instead of 
> an outer shareable memory barrier, or would we need to look as something 
> like a sync barrier?

I think dmb(sy) would do the trick, but let's cross that bridge if/when we
have to.

Will
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