netdev - Re: [PATCH 1/2] can: xilinx: use readl/writel instead of ioread/iowrite

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-Id: <201510260225.30934.arnd@arndb.de>
Date:	Mon, 26 Oct 2015 02:25:30 +0100
From:	Arnd Bergmann <arnd@...db.de>
To:	"Marc Kleine-Budde" <mkl@...gutronix.de>
Cc:	linux-arm-kernel@...ts.infradead.org,
	Kedareswara rao Appana <appana.durga.rao@...inx.com>,
	anirudh@...inx.com, wg@...ndegger.com, michal.simek@...inx.com,
	soren.brinkmann@...inx.com, appanad@...inx.com,
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-can@...r.kernel.org
Subject: Re: [PATCH 1/2] can: xilinx: use readl/writel instead of ioread/iowrite

On Sunday 25 October 2015, Marc Kleine-Budde wrote:
> On 10/22/2015 10:58 AM, Arnd Bergmann wrote:
> >>> The two should really do the same thing: iowrite32() is just a static inline
> >>> calling writel() on both ARM32 and ARM64. On which kernel version did you
> >>> observe the difference? It's possible that an older version used
> >>> CONFIG_GENERIC_IOMAP, which made this slightly more expensive.
> >>>
> >>> If there are barriers that you want to get rid of for performance reasons,
> >>> you should use writel_relaxed(), but be careful to synchronize them correctly
> >>> with regard to DMA. It should be fine in this driver, as it does not
> >>> perform any DMA, but be aware that there is no big-endian version of
> >>> writel_relaxed() at the moment.
> >>
> >> We don't have DMA in CAN drivers, but usually a certain write triggers
> >> sending. Do we need a barrier before triggering the sending?
> > 
> > No, the relaxed writes are not well-defined across architectures. On
> > ARM, the CPU guarantees that stores to an MMIO area are still in order
> > with respect to one another, the barrier is only needed for actual DMA,
> > so you are fine. I would expect the same to be true everywhere,
> > otherwise a lot of other drivers would be broken too.
> 
> And the relaxed functions seem not to be available on all archs. This
> driver should work on microblaze. Are __raw_writeX(), __raw_readX() an
> alternative here?

__raw_writeX() and __raw_readX()  are not safe to use in drivers in general.

readl_relaxed() should work on all architectures nowadays, and I've checked
that it does on microblaze.

	Arnd
--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html