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Message-ID: <20151119011327.GA25930@lunn.ch>
Date:	Thu, 19 Nov 2015 02:13:27 +0100
From:	Andrew Lunn <andrew@...n.ch>
To:	Florian Fainelli <f.fainelli@...il.com>
Cc:	David Miller <davem@...emloft.net>,
	netdev <netdev@...r.kernel.org>,
	Vivien Didelot <vivien.didelot@...oirfairelinux.com>,
	Neil Armstrong <narmstrong@...libre.com>
Subject: Re: [PATCH net-next 2/2] dsa: mv88e6xxx.c: Hardware reset the chip
 if available

> We are embedding reset logic here about the delays and polarity, while
> there is now a proper abstraction for this within the reset controller
> subsystem under drivers/reset/core.c. Could we utilize that facility
> instead which would make us more robust wrt. non-GPIO reset lines (for
> instance some SF2 switches on DSL gateways could definitively benefit
> from this).
> 
> There does not seem to be a reset controller GPIO binding and generic
> driver, but this seems like an appropriate candidate?

Hi Florian

That was my first thought as well. But then i went searching and found

http://permalink.gmane.org/gmane.linux.ports.arm.kernel/257149

where Mark Rutland says no to the idea. reset-gpios should be handle
by the device.

Anyway, delays are hard coded, but polarity not. That is in the
generic device tree binding for a GPIO, you can say GPIO_ACTIVE_LOW or
GPIO_ACTIVE_HIGH. The delays are also hard coded in the Marvell
specific part, so should not cause a problem to other manufactures
chips.

	Andrew

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