netdev - Re: [PATCH] ARM: net: bpf: fix zero right shift

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Message-ID: <20160105175038.GB83548@ast-mbp.thefacebook.com>
Date:	Tue, 5 Jan 2016 09:50:39 -0800
From:	Alexei Starovoitov <alexei.starovoitov@...il.com>
To:	Rabin Vincent <rabin@....in>
Cc:	davem@...emloft.net, netdev@...r.kernel.org,
	linux@....linux.org.uk, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] ARM: net: bpf: fix zero right shift

On Tue, Jan 05, 2016 at 06:34:04PM +0100, Rabin Vincent wrote:
> The LSR instruction cannot be used to perform a zero right shift since a
> 0 as the immediate value (imm5) in the LSR instruction encoding means
> that a shift of 32 is perfomed.  See DecodeIMMShift() in the ARM ARM.
> 
> Make the JIT skip generation of the LSR if a zero-shift is requested.
> 
> This was found using american fuzzy lop.
> 
> Signed-off-by: Rabin Vincent <rabin@....in>

Looks good as a fix for classic jit. For eBPF we would want to check
this in verifier.

Acked-by: Alexei Starovoitov <ast@...nel.org>

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