netdev - Re: [PATCH] ARM: net: bpf: fix zero right shift

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Message-Id: <20160106.013229.122000813125865535.davem@davemloft.net>
Date:	Wed, 06 Jan 2016 01:32:29 -0500 (EST)
From:	David Miller <davem@...emloft.net>
To:	rabin@....in
Cc:	netdev@...r.kernel.org, linux@....linux.org.uk,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] ARM: net: bpf: fix zero right shift

From: Rabin Vincent <rabin@....in>
Date: Tue,  5 Jan 2016 18:34:04 +0100

> The LSR instruction cannot be used to perform a zero right shift since a
> 0 as the immediate value (imm5) in the LSR instruction encoding means
> that a shift of 32 is perfomed.  See DecodeIMMShift() in the ARM ARM.
> 
> Make the JIT skip generation of the LSR if a zero-shift is requested.
> 
> This was found using american fuzzy lop.
> 
> Signed-off-by: Rabin Vincent <rabin@....in>

Applied, thanks.
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