netdev - RE: [PATCH V2 4/5] i40e/ethtool: support coalesce getting by queue

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Message-ID: <FC41C24E35F18A40888AACA1A36F3E418AFE2A29@fmsmsx115.amr.corp.intel.com>
Date:	Thu, 7 Jan 2016 22:19:19 +0000
From:	"Nelson, Shannon" <shannon.nelson@...el.com>
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	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
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	"Kirsher, Jeffrey T" <jeffrey.t.kirsher@...el.com>,
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	"Skidmore, Donald C" <donald.c.skidmore@...el.com>,
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Subject: RE: [PATCH V2 4/5] i40e/ethtool: support coalesce getting by queue


> +
> +		q_vector = vsi->rx_rings[queue]->q_vector;
> +		vector = vsi->base_vector + q_vector->v_idx;
> +		ec->rx_coalesce_usecs = ITR_REG_TO_USEC(rd32(hw, I40E_PFINT_ITRN(0, vector - 1)));

Use I40E_RX_ITR rather than the hardcoded 0

> +
> +		q_vector = vsi->tx_rings[queue]->q_vector;
> +		vector = vsi->base_vector + q_vector->v_idx;
> +		ec->tx_coalesce_usecs = ITR_REG_TO_USEC(rd32(hw, I40E_PFINT_ITRN(1, vector - 1)));

Use I40E_TX_ITR rather than the hardcoded 1

Other than that, yes, this looks like the right translation to get to the itr register you want.

sln