netdev - RE: [PATCH v5 net-next] net: Implement fast csum_partial for x86

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Fri, 4 Mar 2016 10:38:04 +0000
From:	David Laight <David.Laight@...LAB.COM>
To:	'Linus Torvalds' <torvalds@...ux-foundation.org>
CC:	Tom Herbert <tom@...bertland.com>,
	"davem@...emloft.net" <davem@...emloft.net>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"tglx@...utronix.de" <tglx@...utronix.de>,
	"mingo@...hat.com" <mingo@...hat.com>,
	"hpa@...or.com" <hpa@...or.com>, "x86@...nel.org" <x86@...nel.org>,
	"kernel-team@...com" <kernel-team@...com>
Subject: RE: [PATCH v5 net-next] net: Implement fast csum_partial for x86_64

From: Linus Torvalds
> Sent: 03 March 2016 18:44
> 
> On Thu, Mar 3, 2016 at 8:12 AM, David Laight <David.Laight@...lab.com> wrote:
> >
> > Did you try the asm loop that used 'leax %rcx..., jcxz... jmps..'
> > without any unrolling?
> 
> Is that actually supposed to work ok these days? jcxz used to be quite
> slow, and is historically *never* used.
> 
> Now, in theory, loop constructs can actually do better on branch
> prediction etc, but Intel seems to have never really tried to push
> them, and has instead pretty much discouraged them in favor of making
> the normal jumps go faster (including all the instruction fusion etc)

Yes, they've even added the 'adc using the overflow flag' but not made
it possible to put that into a loop.

> From what I have seen, the whole "don't use LOOP or JRCXZ" has not changed.

LOOP is still slow on intel cpus (but is single clock on recentish amd ones).

JCXZ is reasonable on most cpus, certainly all the ones we care about these days.
On intel cpus JCXZ is still 2 clocks, but it removes the dependency on any
flags (which all other conditional instructions have).
The difficulty is using it for a loop (you need JCXNZ or a fast LOOP).
An alternative to the 'JCXZ, JMPS' pair would be to move the high bits
of the counter into the low bits of cx so that cx would become non-zero
on the last iteration.

	David