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Date:	Fri, 1 Apr 2016 01:37:41 +0000
From:	Fugang Duan <fugang.duan@....com>
To:	Fabio Estevam <festevam@...il.com>
CC:	Greg Ungerer <gerg@...inux.org>,
	Troy Kisky <troy.kisky@...ndarydevices.com>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: RE: [PATCH] net: fec: stop the "rcv is not +last, " error messages

From: Fabio Estevam <festevam@...il.com> Sent: Thursday, March 31, 2016 6:57 PM
> To: Fugang Duan <fugang.duan@....com>
> Cc: Greg Ungerer <gerg@...inux.org>; Troy Kisky
> <troy.kisky@...ndarydevices.com>; netdev@...r.kernel.org
> Subject: Re: [PATCH] net: fec: stop the "rcv is not +last, " error messages
> 
> Hi Andy,
> 
> On Wed, Mar 30, 2016 at 10:41 PM, Fugang Duan <fugang.duan@....com>
> wrote:
> >
> > Fabio, we cannot do it like this that may cause confused for the quirk flag
> "FEC_QUIRK_HAS_RACC".
> 
> We can treat FEC_QUIRK_HAS_RACC flag as "this is a non-Coldfire SoC".
> 

FEC_QUIRK_HAS_RACC means the HW support "Receive Accelerator Function Configuration". It is really make somebody confused.

To save trouble,  you treat  FEC_QUIRK_HAS_RACC flag as "this is a non-Coldfire SoC",  you must add comment on the flag define.

> >
> >
> > Hi, Greg,
> >
> > The header file fec.h define the FEC_FTRL as below,  if ColdFire SoC has no this
> register,  we may remove the define in here and define the register according
> to SOC type. For example, it is ColdFire Soc, define it as 0xFFF. Is it  feasible ?
> >
> 
> This is even worse IMHO. We should not write to a 'fake' register offset of 0xFFF.

We can do it like this:

#if defined(CONFIG_ARM)
        writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_FTRL);
#endif

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