netdev - Re: [PATCH net-next 3/6] net/mlx5: Add DCBX firmware commands support

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Message-ID: <508E873A-0F08-42C2-B6E9-C513CD1B9258@mellanox.com>
Date:   Wed, 31 Aug 2016 14:49:44 +0000
From:   Huy Nguyen <huyn@...lanox.com>
To:     zhuyj <zyjzyj2000@...il.com>
CC:     Saeed Mahameed <saeedm@...lanox.com>,
        "David S. Miller" <davem@...emloft.net>,
        netdev <netdev@...r.kernel.org>
Subject: Re: [PATCH net-next 3/6] net/mlx5: Add DCBX firmware commands support



> On Aug 31, 2016, at 6:24 AM, zhuyj <zyjzyj2000@...il.com> wrote:
> 
> +       u32 in[MLX5_ST_SZ_DW(dcbx_param)];
> +
> +       memset(in, 0, sizeof(in));
> 
> can we replace the above with "u32 in[MLX5_ST_SZ_DW(dcbx_param)] = {0};"?
> 
> 
> 
>> On Tue, Aug 30, 2016 at 7:29 PM, Saeed Mahameed <saeedm@...lanox.com> wrote:
>> From: Huy Nguyen <huyn@...lanox.com>
>> 
>> Add set/query commands for DCBX_PARAM register
>> 
>> Signed-off-by: Huy Nguyen <huyn@...lanox.com>
>> Signed-off-by: Saeed Mahameed <saeedm@...lanox.com>
>> ---
>> drivers/net/ethernet/mellanox/mlx5/core/port.c | 22 ++++++++++++++++++++++
>> include/linux/mlx5/driver.h                    |  7 +++++++
>> include/linux/mlx5/port.h                      |  2 ++
>> 3 files changed, 31 insertions(+)
>> 
>> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/port.c b/drivers/net/ethernet/mellanox/mlx5/core/port.c
>> index 2f75f86..8a66595 100644
>> --- a/drivers/net/ethernet/mellanox/mlx5/core/port.c
>> +++ b/drivers/net/ethernet/mellanox/mlx5/core/port.c
>> @@ -548,6 +548,28 @@ int mlx5_max_tc(struct mlx5_core_dev *mdev)
>>        return num_tc - 1;
>> }
>> 
>> +int mlx5_query_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *out)
>> +{
>> +       u32 in[MLX5_ST_SZ_DW(dcbx_param)];
>> +
>> +       memset(in, 0, sizeof(in));
>> +
>> +       MLX5_SET(dcbx_param, in, port_number, 1);
>> +
>> +       return  mlx5_core_access_reg(mdev, in, sizeof(in), out,
>> +                                   sizeof(in), MLX5_REG_DCBX_PARAM, 0, 0);
>> +}
>> +
>> +int mlx5_set_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *in)
>> +{
>> +       u32 out[MLX5_ST_SZ_DW(dcbx_param)];
>> +
>> +       MLX5_SET(dcbx_param, in, port_number, 1);
>> +
>> +       return mlx5_core_access_reg(mdev, in, sizeof(out), out,
>> +                                   sizeof(out), MLX5_REG_DCBX_PARAM, 0, 1);
>> +}
>> +
>> int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc)
>> {
>>        u32 in[MLX5_ST_SZ_DW(qtct_reg)] = {0};
>> diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
>> index 5cb9fa7..b53f19c 100644
>> --- a/include/linux/mlx5/driver.h
>> +++ b/include/linux/mlx5/driver.h
>> @@ -104,6 +104,8 @@ enum {
>> enum {
>>        MLX5_REG_QETCR           = 0x4005,
>>        MLX5_REG_QTCT            = 0x400a,
>> +       MLX5_REG_DCBX_PARAM      = 0x4020,
>> +       MLX5_REG_DCBX_APP        = 0x4021,
>>        MLX5_REG_PCAP            = 0x5001,
>>        MLX5_REG_PMTU            = 0x5003,
>>        MLX5_REG_PTYS            = 0x5004,
>> @@ -123,6 +125,11 @@ enum {
>>        MLX5_REG_MLCR            = 0x902b,
>> };
>> 
>> +enum mlx5_dcbx_oper_mode {
>> +       MLX5E_DCBX_PARAM_VER_OPER_HOST  = 0x0,
>> +       MLX5E_DCBX_PARAM_VER_OPER_AUTO  = 0x3,
>> +};
>> +
>> enum {
>>        MLX5_ATOMIC_OPS_CMP_SWAP        = 1 << 0,
>>        MLX5_ATOMIC_OPS_FETCH_ADD       = 1 << 1,
>> diff --git a/include/linux/mlx5/port.h b/include/linux/mlx5/port.h
>> index ddad24d..62e2259 100644
>> --- a/include/linux/mlx5/port.h
>> +++ b/include/linux/mlx5/port.h
>> @@ -159,4 +159,6 @@ void mlx5_query_port_fcs(struct mlx5_core_dev *mdev, bool *supported,
>> int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,
>>                             u16 offset, u16 size, u8 *data);
>> 
>> +int mlx5_query_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *out);
>> +int mlx5_set_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *in);
>> #endif /* __MLX5_PORT_H__ */
>> --
>> 2.7.4
Yes I will fix. Thank you.