netdev - Re: Alignment issues with freescale FEC driver

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Message-Id: <20160923.224305.942077200829435690.davem@davemloft.net>
Date:   Fri, 23 Sep 2016 22:43:05 -0400 (EDT)
From:   David Miller <davem@...emloft.net>
To:     eric@...int.com
Cc:     edumazet@...gle.com, linux-arm-kernel@...ts.infradead.org,
        netdev@...r.kernel.org, rmk+kernel@....linux.org.uk,
        fugang.duan@....com, troy.kisky@...ndarydevices.com,
        otavio@...ystems.com.br, cjb.sw.nospam@...il.com
Subject: Re: Alignment issues with freescale FEC driver

From: Eric Nelson <eric@...int.com>
Date: Fri, 23 Sep 2016 10:33:29 -0700

> Since the hardware requires longword alignment for its' DMA transfers,
> aligning the IP header will require a memcpy, right?

I wish hardware designers didn't do this.

There is no conflict between DMA alignment and properly offseting
the packet data by two bytes.

All hardware designers have to do is allow 2 padding bytes to be
emitted by the chip before the actual packet data.

Then the longword or whatever DMA transfer alignment is met
whilst still giving the necessary flexibility for where the
packet data lands.