lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 12 Oct 2016 16:06:13 +0300
From:   Luca Coelho <luca@...lho.fi>
To:     Paul Bolle <pebolle@...cali.nl>, Chris Rorvick <chris@...vick.com>
Cc:     Intel Linux Wireless <linuxwifi@...el.com>,
        Emmanuel Grumbach <emmanuel.grumbach@...el.com>,
        Johannes Berg <johannes.berg@...el.com>,
        Kalle Valo <kvalo@...eaurora.org>,
        Oren Givon <oren.givon@...el.com>,
        linux-wireless@...r.kernel.org, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] iwlwifi: pcie: reduce "unsupported splx" to a warning

On Wed, 2016-10-12 at 14:36 +0200, Paul Bolle wrote:
> On Wed, 2016-10-12 at 15:24 +0300, Luca Coelho wrote:
> > Okay... Actually this is a structure in the BIOS and the actual method
> > we call is SPLC.  The SPLC method may return one item from this table,
> > or something entirely different, possible one of the three values
> > depending on a configuration option or so.
> > 
> > Can you to find and send me the actual SPLC method that we call, from
> > your BIOS?
> 
> 
> It seems Chris and I basically have identical setups, so I'll answer.

Thanks! Yeah, I implied any of you two. ;)


> There are 20 SPLC methods in the BIOS. The first reads
>     Method (SPLC, 0, Serialized)
>     {
>         DerefOf (SPLX [One]) [Zero] = DOM1 /* \DOM1 */
>         DerefOf (SPLX [One]) [One] = LIM1 /* \LIM1 */
>         DerefOf (SPLX [One]) [0x02] = TIM1 /* \TIM1 */
>         DerefOf (SPLX [0x02]) [Zero] = DOM2 /* \DOM2 */
>         DerefOf (SPLX [0x02]) [One] = LIM2 /* \LIM2 */
>         DerefOf (SPLX [0x02]) [0x02] = TIM2 /* \TIM2 */
>         DerefOf (SPLX [0x03]) [Zero] = DOM3 /* \DOM3 */
>         DerefOf (SPLX [0x03]) [One] = LIM3 /* \LIM3 */
>         DerefOf (SPLX [0x03]) [0x02] = TIM3 /* \TIM3 */
>         Return (SPLX) /* \_SB_.PCI0.RP01.PXSX.SPLX */
>     }
> 
> The only difference is in the last comment. Ie, RP01 is increased until
> it reaches RP20. (The machine has 20 PCI devices according to lspci. I
> have no clue how to match that RPxx number to the 20 devices showing up
> in lspci, sorry.)

No problem, these BIOSes are usually quite cryptic. :) But what you're
saying makes sense.  They have added the SPLC method to all PCI root-
ports (which is what RP stands for here).

And, the values in the SPLX structs are being changed here, to DOM1,
LIM1, TIM1 etc., before being returned.  This also matches your
description that, at runtime, you got something different than the pure
dump.  If you follow these DOM*, LIM*, TIM* symbols, you'll probably
end up getting the values you observed at runtime.

Basically this tells me that indeed 3 "structs" are being returned (as
your dumps already showed).  And, according to the specs that I found
(which unfortunately are confidential, so I can't share) this is
correct and the driver code is broken.

I'll send you a patch for testing soon.

Thanks for all the help!

--
Cheers,
Luca.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ