[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <1484320752-32096-1-git-send-email-volodymyr.bendiuga@gmail.com>
Date: Fri, 13 Jan 2017 16:19:12 +0100
From: Volodymyr Bendiuga <volodymyr.bendiuga@...il.com>
To: f.fainelli@...il.com, netdev@...r.kernel.org,
volodymyr.bendiuga@...termo.se
Cc: Magnus Öberg <magnus.oberg@...termo.se>
Subject: [PATCH net-next] mii_bus: increase MII_BUS_ID_SIZE to 61
From: Volodymyr Bendiuga <volodymyr.bendiuga@...termo.se>
Some bus names are pretty long and do not fit into 20 chars.
Signed-off-by: Volodymyr Bendiuga <volodymyr.bendiuga@...termo.se>
Signed-off-by: Magnus Öberg <magnus.oberg@...termo.se>
---
include/linux/phy.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/phy.h b/include/linux/phy.h
index feb8a98..b67f94d 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -162,7 +162,7 @@ static inline const char *phy_modes(phy_interface_t interface)
* Need to be a little smaller than phydev->dev.bus_id to leave room
* for the ":%02x"
*/
-#define MII_BUS_ID_SIZE (20 - 3)
+#define MII_BUS_ID_SIZE (64 - 3)
/* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
--
2.7.4
Powered by blists - more mailing lists