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Message-ID: <3493169361fe445ba971951b40360301@svr-chch-ex1.atlnz.lc>
Date: Thu, 26 Jan 2017 20:07:47 +0000
From: Chris Packham <Chris.Packham@...iedtelesis.co.nz>
To: Gregory CLEMENT <gregory.clement@...e-electrons.com>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Jason Cooper <jason@...edaemon.net>,
Andrew Lunn <andrew@...n.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Russell King <linux@...linux.org.uk>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: [PATCHv3 4/5] arm: mvebu: Add device tree for 98DX3236 SoCs
On 27/01/17 04:10, Gregory CLEMENT wrote:
> Hi Chris,
>
> On ven., janv. 06 2017, Chris Packham <chris.packham@...iedtelesis.co.nz> wrote:
>
>> The Marvell 98DX3236, 98DX3336, 98DX4521 and variants are switch ASICs
>> with integrated CPUs. They are similar to the Armada XP SoCs but have
>> different I/O interfaces.
>
> Before sending a new version I have a few remarks:
>
>
[snip]
I'll update the dtsi files to use the node labels and correct the
commends as requested
>
> Why the following node is not part of the dtsi?
>
> Gregory
>
>> + resume@...80 {
>> + compatible = "marvell,98dx3336-resume-ctrl";
>> + reg = <0x20980 0x10>;
>> + };
>> + };
>> + };
The 98DX9236 has a single ARMv7 core. As such this resume control isn't
present on it. The 98DX3336 and 98DX4521 have dual ARMv7 cores and this
is used to boot the second core (SMP support is a little different
compared to Armada-XP).
In other words {98DX3336, 98DX4521} = 98DX9236 + an additional core. At
the switch packet processor level there are more differences but as far
as the kernel is concerned the only real difference is the number of cores.
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