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Date: Tue, 06 Jun 2017 14:38:24 -0400 (EDT)
From: David Miller <davem@...emloft.net>
To: alexei.starovoitov@...il.com
Cc: jgunthorpe@...idianresearch.com, ilant@...lanox.com,
saeedm@....mellanox.co.il, dledford@...hat.com,
netdev@...r.kernel.org, linux-rdma@...r.kernel.org,
jsorensen@...com, andy.shevchenko@...il.com,
linux-fpga@...r.kernel.org, atull@...nsource.altera.com,
yi1.li@...ux.intel.com, borisp@...lanox.com
Subject: Re: [for-next 4/6] net/mlx5: FPGA, Add basic support for Innova
From: Alexei Starovoitov <alexei.starovoitov@...il.com>
Date: Tue, 6 Jun 2017 11:34:59 -0700
> fpga is a separate device with its own phy and mac layers, its
> own queues, packet parsing and rdma logic.
Because that's how they bolted it onto the ASIC in current
implementation, it might not always be that way and be fully
integrated in the future.
And I stress the word "implementation" as in "implementation detail"
the visible behavior is going to be the same, the difference is how
the thing is hooked up and maybe how you program it.
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