netdev - Re: [for-next 4/6] net/mlx5: FPGA, Add basic support for Innova

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Date:   Tue, 6 Jun 2017 11:55:33 -0700
From:   Alexei Starovoitov <alexei.starovoitov@...il.com>
To:     David Miller <davem@...emloft.net>
Cc:     jgunthorpe@...idianresearch.com, ilant@...lanox.com,
        saeedm@....mellanox.co.il, dledford@...hat.com,
        netdev@...r.kernel.org, linux-rdma@...r.kernel.org,
        jsorensen@...com, andy.shevchenko@...il.com,
        linux-fpga@...r.kernel.org, yi1.li@...ux.intel.com,
        borisp@...lanox.com
Subject: Re: [for-next 4/6] net/mlx5: FPGA, Add basic support for Innova

On Tue, Jun 06, 2017 at 02:38:24PM -0400, David Miller wrote:
> From: Alexei Starovoitov <alexei.starovoitov@...il.com>
> Date: Tue, 6 Jun 2017 11:34:59 -0700
> 
> > fpga is a separate device with its own phy and mac layers, its
> > own queues, packet parsing and rdma logic.
> 
> Because that's how they bolted it onto the ASIC in current
> implementation, it might not always be that way and be fully
> integrated in the future.
> 
> And I stress the word "implementation" as in "implementation detail"
> the visible behavior is going to be the same, the difference is how
> the thing is hooked up and maybe how you program it.

whether fpga is a separate chip or part of the same asic makes no difference.
They are still different devices from sw point of view.
If in the future mlx will make it into the nic in a way that encryption shares
all memory management logic and there is no fpga at all then it indeed will
be similar to tc offload. Right now it's not and needs different sw architecture.