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Message-ID: <293edadc5ed14687b388c88802798dd8@AcuMS.aculab.com>
Date: Mon, 20 Nov 2017 14:58:57 +0000
From: David Laight <David.Laight@...LAB.COM>
To: 'Simon Guinot' <simon.guinot@...uanux.org>,
David Miller <davem@...emloft.net>
CC: "thomas.petazzoni@...e-electrons.com"
<thomas.petazzoni@...e-electrons.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"musv@....de" <musv@....de>,
"andreas.tobler@...udguard.ch" <andreas.tobler@...udguard.ch>,
"gregory.clement@...e-electrons.com"
<gregory.clement@...e-electrons.com>,
"antoine.tenart@...e-electrons.com"
<antoine.tenart@...e-electrons.com>,
"mw@...ihalf.com" <mw@...ihalf.com>,
"stable@...r.kernel.org" <stable@...r.kernel.org>
Subject: RE: [PATCH] net: mvneta: fix handling of the Tx descriptor counter
From: Simon Guinot
> Sent: 13 November 2017 15:36
> To: David Miller
> Cc: thomas.petazzoni@...e-electrons.com; netdev@...r.kernel.org; musv@....de;
> andreas.tobler@...udguard.ch; gregory.clement@...e-electrons.com; antoine.tenart@...e-electrons.com;
> mw@...ihalf.com; stable@...r.kernel.org
> Subject: Re: [PATCH] net: mvneta: fix handling of the Tx descriptor counter
>
> On Mon, Nov 13, 2017 at 11:54:14PM +0900, David Miller wrote:
> > From: Simon Guinot <simon.guinot@...uanux.org>
> > Date: Mon, 13 Nov 2017 15:51:15 +0100
> >
> > > IIUC the driver stops the queue if a threshold of 316 Tx descriptors is
> > > reached (default and worst value).
> >
> > That's a lot of latency.
>
> OK, then I'll keep the "tx_pending > 255" flushing condition. But note
> there is no other software mechanism to limit the Tx latency inside the
> mvneta driver. Should we add something ? And is that not rather the job
> of the network stack to keep track of the latency and to limit the txq
> size ?
This is 'first packet transmit latency'.
If the 'doorbell write' is just a PCIe write then, on most systems,
that is cheap and pipelined/posted.
I'd almost be surprised if you see any 'improvement' from not doing
it every packet.
The overall tx queue size is a different issue - usually needs
limiting by BQL if TSO is done.
David
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