netdev - Re: [PATCH RFC 0/4] Fixes for Marvell MII paged register access races

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Date:   Sat, 9 Dec 2017 10:22:58 -0800
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Russell King - ARM Linux <linux@...linux.org.uk>,
        Andrew Lunn <andrew@...n.ch>
Cc:     netdev@...r.kernel.org
Subject: Re: [PATCH RFC 0/4] Fixes for Marvell MII paged register access races



On 12/08/2017 08:44 AM, Russell King - ARM Linux wrote:
> On Fri, Dec 08, 2017 at 05:17:14PM +0100, Andrew Lunn wrote:
>> Hi Russell
>>
>>> There is an open question whether there should be generic helpers for
>>> this.  Generic helpers would mean:
>>>
>>> - Additional couple of function pointers in phy_driver to read/write the
>>>   paging register.  This has the restriction that there must only be one
>>>   paging register.
>>
>> I must be missing something. I don't see why there is this
>> restriction. Don't we just need
>>
>> int phy_get_page(phydev);
>> int phy_set_page(phydev, page);
> 
> The restriction occurs because a PHY may have several different
> registers, and knowing which of the registers need touching becomes an
> issue.  We wouldn't want these accessors to needlessly access several
> registers each and every time we requested an access to the page
> register.
> 
> There's also the issue of whether an "int" or whatever type we choose to
> pass the "page" around is enough bits.  I haven't surveyed all the PHY
> drivers yet to know the answer to that.

I have not come across a PHY yet that required writing a page across two
16-bit quantities, in general, the page fits within less than 16-bit
actually to fit within one MDIO write. That does not mean it cannot
exist obviously, but having about 32-bit x pages of address space within
a PHY sounds a bit extreme.
-- 
Florian