[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1522232416.21446.10.camel@kernel.crashing.org>
Date: Wed, 28 Mar 2018 21:20:16 +1100
From: Benjamin Herrenschmidt <benh@...nel.crashing.org>
To: Lino Sanfilippo <LinoSanfilippo@....de>
Cc: Will Deacon <will.deacon@....com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Alexander Duyck <alexander.duyck@...il.com>,
Sinan Kaya <okaya@...eaurora.org>,
Arnd Bergmann <arnd@...db.de>, Jason Gunthorpe <jgg@...pe.ca>,
David Laight <David.Laight@...lab.com>,
Oliver <oohall@...il.com>,
"open list:LINUX FOR POWERPC (32-BIT AND 64-BIT)"
<linuxppc-dev@...ts.ozlabs.org>,
"linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: Aw: Re: RFC on writel and writel_relaxed
On Wed, 2018-03-28 at 12:13 +0200, Lino Sanfilippo wrote:
> Hi,
>
>
> >
> > Yeah so that other trick I'm talking about is also used for timing
> > accuracy.
> >
> > For example, let's say I have a device with a reset bit and the spec
> > says the reset bit needs to be set for at least 10us.
> >
> > This is wrong:
> >
> > writel(1, RESET_REG);
> > usleep(10);
> > writel(0, RESET_REG);
> >
> > Because of write posting, the first write might arrive to the device
> > right before the second one.
> >
>
> Does not write posting only concern PCI? This seems to be a different topic. Furthermore
> write posting should not include write reordering...
Nobody's talking about re-ordering and no, write posting is rather
common practice on a whole lot of different busses, not just PCI(e).
Cheers,
Ben.
Powered by blists - more mailing lists