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Message-ID: <20180329080929.6b56e8be@roar.ozlabs.ibm.com>
Date: Thu, 29 Mar 2018 08:09:29 +1000
From: Nicholas Piggin <npiggin@...il.com>
To: Benjamin Herrenschmidt <benh@...nel.crashing.org>
Cc: David Miller <davem@...emloft.net>, paulmck@...ux.vnet.ibm.com,
arnd@...db.de, linux-rdma@...r.kernel.org,
linuxppc-dev@...ts.ozlabs.org, linus971@...il.com,
will.deacon@....com, alexander.duyck@...il.com,
okaya@...eaurora.org, jgg@...pe.ca, David.Laight@...lab.com,
oohall@...il.com, netdev@...r.kernel.org,
alexander.h.duyck@...hat.com, torvalds@...ux-foundation.org
Subject: Re: RFC on writel and writel_relaxed
On Thu, 29 Mar 2018 08:31:32 +1100
Benjamin Herrenschmidt <benh@...nel.crashing.org> wrote:
> On Thu, 2018-03-29 at 02:23 +1000, Nicholas Piggin wrote:
> > On Wed, 28 Mar 2018 11:55:09 -0400 (EDT)
> > David Miller <davem@...emloft.net> wrote:
> >
> > > From: Benjamin Herrenschmidt <benh@...nel.crashing.org>
> > > Date: Thu, 29 Mar 2018 02:13:16 +1100
> > >
> > > > Let's fix all archs, it's way easier than fixing all drivers. Half of
> > > > the archs are unused or dead anyway.
> > >
> > > Agreed.
> >
> > While we're making decrees here, can we do something about mmiowb?
> > The semantics are basically indecipherable.
>
> I was going to tackle that next :-)
>
> > This is a variation on the mandatory write barrier that causes writes to weakly
> > ordered I/O regions to be partially ordered. Its effects may go beyond the
> > CPU->Hardware interface and actually affect the hardware at some level.
> >
> > How can a driver writer possibly get that right?
> >
> > IIRC it was added for some big ia64 system that was really expensive
> > to implement the proper wmb() semantics on. So wmb() semantics were
> > quietly downgraded, then the subsequently broken drivers they cared
> > about were fixed by adding the stronger mmiowb().
> >
> > What should have happened was wmb and writel remained correct, sane, and
> > expensive, and they add an mmio_wmb() to order MMIO stores made by the
> > writel_relaxed accessors, then use that to speed up the few drivers they
> > care about.
> >
> > Now that ia64 doesn't matter too much, can we deprecate mmiowb and just
> > make wmb ordering talk about stores to the device, not to some
> > intermediate stage of the interconnect where it can be subsequently
> > reordered wrt the device? Drivers can be converted back to using wmb
> > or writel gradually.
>
> I was under the impression that mmiowb was specifically about ordering
> writel's with a subsequent spin_unlock, without it, MMIOs from
> different CPUs (within the same lock) would still arrive OO.
Yes more or less, and I think that until mmiowb was introduced, wmb
or writel was sufficient for this.
Thanks,
Nick
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