netdev - Re: i.MX6S/DL and QCA8334 switch using DSA driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20180430132025.GF10066@lunn.ch>
Date:   Mon, 30 Apr 2018 15:20:25 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Michal Vokáč <vokac.m@...il.com>
Cc:     netdev@...r.kernel.org,
        Vivien Didelot <vivien.didelot@...oirfairelinux.com>,
        Florian Fainelli <f.fainelli@...il.com>
Subject: Re: i.MX6S/DL and QCA8334 switch using DSA driver - CPU port not
 working

> Using rgmii-id for the port is not valid as the qca8k driver does not support
> that mode. It only supports rgmii and sgmii. I think this is actually not
> correct. When phy-mode is set to rgmii for port the qca8k driver configures
> internal delays in the switch. So it behaves like rgmii-id I think.
> 
> Should not it be:
> 
> --- a/drivers/net/dsa/qca8k.c
> +++ b/drivers/net/dsa/qca8k.c
> @@ -474,7 +474,7 @@ qca8k_set_pad_ctrl(struct qca8k_priv *priv, int port, int mode)
>  	 * PHY or MAC.
>  	 */
>  	switch (mode) {
> -	case PHY_INTERFACE_MODE_RGMII:
> +	case PHY_INTERFACE_MODE_RGMII_ID:
>  	qca8k_write(priv, reg,
> 		    QCA8K_PORT_PAD_RGMII_EN |
> 		    QCA8K_PORT_PAD_RGMII_TX_DELAY(3) |

We have to be careful cleaning this up. It has the potential to break
existing boards when using an old device tree blob.

	 Andrew