netdev - Re: [PATCH 2/4] r8169: Get and enable optional ether

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Message-ID: <153539565488.129321.2586881199420174235@swboyd.mtv.corp.google.com>
Date:   Mon, 27 Aug 2018 11:47:34 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     "David S . Miller" <davem@...emloft.net>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Hans de Goede <hdegoede@...hat.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Irina Tirdea <irina.tirdea@...el.com>,
        Michael Turquette <mturquette@...libre.com>
Cc:     Hans de Goede <hdegoede@...hat.com>, netdev@...r.kernel.org,
        Johannes Stezenbach <js@...21.net>,
        Carlo Caione <carlo@...lessm.com>, linux-clk@...r.kernel.org
Subject: Re: [PATCH 2/4] r8169: Get and enable optional ether_clk clock

Quoting Hans de Goede (2018-08-27 07:31:58)
> On some boards a platform clock is used as clock for the r8169 chip,
> this commit adds support for getting and enabling this clock (assuming
> it has an "ether_clk" alias set on it).
> 
> This is related to commit d31fd43c0f9a ("clk: x86: Do not gate clocks
> enabled by the firmware") which is a previous attempt to fix this for some
> x86 boards, but this causes all Cherry Trail SoC using boards to not reach
> there lowest power states when suspending.
> 
> This commit (together with an atom-pmc-clk driver commit adding the alias)
> fixes things properly by making the r8169 get the clock and enable it when
> it needs it.
> 
> Buglink: https://bugzilla.kernel.org/show_bug.cgi?id=193891#c102
> Cc: Johannes Stezenbach <js@...21.net>
> Cc: Carlo Caione <carlo@...lessm.com>
> Signed-off-by: Hans de Goede <hdegoede@...hat.com>

Acked-by: Stephen Boyd <sboyd@...nel.org>

> @@ -7614,6 +7616,11 @@ static void rtl_hw_initialize(struct rtl8169_private *tp)
>         }
>  }
>  
> +static void rtl_disable_clk(void *data)
> +{
> +       clk_disable_unprepare(data);
> +}
> +
>  static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
>  {
>         const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
> @@ -7647,6 +7654,32 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
>         mii->reg_num_mask = 0x1f;
>         mii->supports_gmii = cfg->has_gmii;
>  
> +       /* Get the *optional* external "ether_clk" used on some boards */
> +       tp->clk = devm_clk_get(&pdev->dev, "ether_clk");

An "optional" clk API is in flight, but it's easier to wait for that to
merge and then this to be updated, so just take that as an FYI. It would
be interesting to see how to support optional clks with clkdev lookups
though, which would be needed in this case.

How would you know that a clk device driver hasn't probed yet and isn't
the driver that's actually providing the clk to this device on x86
systems? With DT systems we can figure that out by looking at the DT and
seeing if the device driver requesting the clk has the clocks property.
On x86 systems it's all clkdev which doesn't really lend itself to
solving this problem.

> +       if (IS_ERR(tp->clk)) {
> +               rc = PTR_ERR(tp->clk);