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Message-ID: <20180910214908.GA30443@bogus>
Date: Mon, 10 Sep 2018 16:49:08 -0500
From: Rob Herring <robh@...nel.org>
To: Hauke Mehrtens <hauke@...ke-m.de>
Cc: davem@...emloft.net, netdev@...r.kernel.org, andrew@...n.ch,
vivien.didelot@...oirfairelinux.com, f.fainelli@...il.com,
john@...ozen.org, linux-mips@...ux-mips.org, dev@...sin.me,
hauke.mehrtens@...el.com, devicetree@...r.kernel.org
Subject: Re: [PATCH v3 net-next 3/6] dt-bindings: net: Add lantiq,xrx200-net
DT bindings
On Sun, Sep 09, 2018 at 10:16:44PM +0200, Hauke Mehrtens wrote:
> This adds the binding for the PMAC core between the CPU and the GSWIP
> switch found on the xrx200 / VR9 Lantiq / Intel SoC.
>
> Signed-off-by: Hauke Mehrtens <hauke@...ke-m.de>
> Cc: devicetree@...r.kernel.org
> ---
> .../devicetree/bindings/net/lantiq,xrx200-net.txt | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/lantiq,xrx200-net.txt
>
> diff --git a/Documentation/devicetree/bindings/net/lantiq,xrx200-net.txt b/Documentation/devicetree/bindings/net/lantiq,xrx200-net.txt
> new file mode 100644
> index 000000000000..8a2fe5200cdc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/lantiq,xrx200-net.txt
> @@ -0,0 +1,21 @@
> +Lantiq xRX200 GSWIP PMAC Ethernet driver
> +==================================
> +
> +Required properties:
> +
> +- compatible : "lantiq,xrx200-net" for the PMAC of the embedded
> + : GSWIP in the xXR200
> +- reg : memory range of the PMAC core inside of the GSWIP core
> +- interrupts : TX and RX DMA interrupts. Use interrupt-names "tx" for
> + : the TX interrupt and "rx" for the RX interrupt.
> +
> +Example:
> +
> +eth0: eth@...B308 {
ethernet@...b308
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "lantiq,xrx200-net";
> + reg = <0xE10B308 0x30>;
lowercase hex please.
> + interrupts = <73>, <72>;
> + interrupt-names = "tx", "rx";
> +};
> --
> 2.11.0
>
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