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Message-ID: <CAD8Lp474=_Yy62O6SX4_jGvJLUJyeMBkircyPeDG+NkGA7EhqQ@mail.gmail.com>
Date:   Wed, 12 Sep 2018 17:37:37 +0800
From:   Daniel Drake <drake@...lessm.com>
To:     "Rafael J. Wysocki" <rafael@...nel.org>
Cc:     Bjorn Helgaas <bhelgaas@...gle.com>,
        Linux PCI <linux-pci@...r.kernel.org>,
        Linux Upstreaming Team <linux@...lessm.com>,
        nouveau@...ts.freedesktop.org, Linux PM <linux-pm@...r.kernel.org>,
        Peter Wu <peter@...ensteyn.nl>, kherbst@...hat.com,
        Rafael Wysocki <rafael.j.wysocki@...el.com>,
        Keith Busch <keith.busch@...el.com>,
        Mika Westerberg <mika.westerberg@...ux.intel.com>,
        Jon Derrick <jonathan.derrick@...el.com>,
        Thomas Martitz <kugel@...kbox.org>,
        David Miller <davem@...emloft.net>,
        Heiner Kallweit <hkallweit1@...il.com>,
        netdev <netdev@...r.kernel.org>, nic_swsd@...ltek.com,
        rchang@...vell.com
Subject: Re: [PATCH v2] PCI: Reprogram bridge prefetch registers on resume

On Wed, Sep 12, 2018 at 5:05 PM, Rafael J. Wysocki <rafael@...nel.org> wrote:
> Passing the extra bool around is somewhat clumsy, but I haven't found
> a cleaner way to do it, so

Thanks, according to your suggestion (which I plan to follow after
this) we will remove this parameter for v4.20+ and have all the
register writes be forced regardless of current value.

Daniel

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