netdev - Re: [PATCH v3 net-next] ravb: do not write 1 to reserved bits

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Message-ID: <56bacfca-e2a9-fbad-77cc-5c06d10f0648@cogentembedded.com>
Date:   Tue, 18 Sep 2018 19:56:45 +0300
From:   Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:     Simon Horman <horms+renesas@...ge.net.au>,
        David Miller <davem@...emloft.net>
Cc:     Magnus Damm <magnus.damm@...il.com>, netdev@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org
Subject: Re: [PATCH v3 net-next] ravb: do not write 1 to reserved bits

On 09/18/2018 01:22 PM, Simon Horman wrote:

> From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@...esas.com>
> 
> EtherAVB hardware requires 0 to be written to status register bits in
> order to clear them, however, care must be taken not to:
> 
> 1. Clear other bits, by writing zero to them
> 2. Write one to reserved bits
> 
> This patch corrects the ravb driver with respect to the second point above.
> This is done by defining reserved bit masks for the affected registers and,
> after auditing the code, ensure all sites that may write a one to a
> reserved bit use are suitably masked.
> 
> Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@...esas.com>
> Signed-off-by: Simon Horman <horms+renesas@...ge.net.au>

   BTW, perhaps this should be merged into net.git instead? DaveM, your call? :-)

MBR, Sergei