netdev - Re: [PATCH] net: phy: tja11xx: Add TJA11xx PHY driver

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Message-ID: <29915c86-3643-1b2f-04d1-63c565ad171d@gmail.com>
Date:   Thu, 13 Dec 2018 10:53:43 -0800
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Marek Vasut <marex@...x.de>, netdev@...r.kernel.org
Cc:     andrew@...n.ch
Subject: Re: [PATCH] net: phy: tja11xx: Add TJA11xx PHY driver

Le 12/12/18 à 6:01 PM, Marek Vasut a écrit :
> Add driver for the NXP TJA1100 and TJA1101 PHYs. These PHYs are special
> BroadRReach 100BaseT1 PHYs used in automotive.
> 
> Signed-off-by: Marek Vasut <marex@...x.de>
> ---

[snip]

> +#define PHY_ID_MASK			0xfffffff0
> +#define PHY_ID_TJA1100			0x0180dc40
> +#define PHY_ID_TJA1101			0x0180dd00
> +
> +#define MII_ECTRL			17

Stylistic preference, but for register offsets, using hexadecimal may be
more natural than using decimal.

[snip]

> +static int tja11xx_soft_reset(struct phy_device *phydev)
> +{
> +	int ret;
> +
> +	ret = tja11xx_enable_reg_write(phydev);
> +	if (ret < 0)
> +		return ret;
> +
> +	ret = phy_write(phydev, 0x0, 0xa100);
> +	return ret < 0 ? ret : 0;

Can you utilize genphy_soft_reset() here or at least not open code the
register offset and the bits you write to (use MII_BMCR and
BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_RESET).
-- 
Florian